Daily Image

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Testing Gemini LRU

Submitter: Gijs Schooderbeek (Astron) / Leon Hiemstra (Astron) / Andrew Brown CSIRO
Description: The daily image of today shows Gemini LRU (Line Replaceable Unit). This is the successor of Gemini POC (Proof Of Concept) which can be seen in the daily image of 01-05-2017 http://www.astron.nl/dailyimage/main.php?date=20170501). The board now has a subrack based structure. By this, swapping Gemini boards in case of failures is made much easier. Gemini LRU has more than 70% of its connections through a backplane, these connection are simply made by sliding Gemini in a subrack. At the back side of the board an electrical connector is used for power and control. In the center of Gemini LRU, optical transceivers will be mounted. Each of the three optical transceivers have 12 transmit and 12 receive fiber channels which can run at 25Gbps each. These results in a total Gemini IO cross connect capability of 900Gbps. The optics will be connected to an optical connector at the back of the board. On the backplane in the subrack an optical circuit will be assembled to facilitate all interconnections in between the FPGAs in the Perentie SKA-Low Correlator & Beamformer. For the cooling a manifold will be installed on the backplane (see daily image of 31-07-2017 http://www.astron.nl/dailyimage/main.php?date=20170501)
A Xilinx Virtex Ultrascale+ FPGA (field programmable gate array), underneath the liquid cooling on the image, will be used for processing, just as on Gemini POC. The FPGA houses 6840 DPS (digital signal processing) slices that gives a processing capacity of about 3TMAC (Multiply and Accumulate). For storage a DDR4 SODIMM memory slot (same as used in modern laptops) will be used. Four QSFP 100Gbps interfaces are used for external communication outside Perentie (interfaces to LFAA and SDP). A 10GbE SFP module will be used for the control interface.
Copyright: ASTRON / CSIRO
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