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14-12-2015
UniBoard2 has arrived
| Submitter: | Gijs Schoonderbeek |
| Description: | After a period of nearly 3.5 years the Radionet FP7 UniBoard2 project comes to an end. The goal of the project was to create an FPGA-based generic scalable high-performance computing platform. With the production of 7 UniBoard2s this goal has been achieved. UniBoard2 is built with Altera Arria10 20nm FPGAs (at this point still engineering samples). Given the ultimate purpose of UniBoard2, namely next generation radio-astronomical computing, a maximal IO capacity has been implemented on UniBoard2. On the front panel 24 interfaces can be constructed of 40Gbps each. On the backplane side a total of 2Tbps connectivity is available, to other UniBoard2s, ADCs or memory devices. In total the IO for a single UniBoard2 is 3Tbps. This is close to the peak aggregated traffic on all of the Amsterdam Internet Exchange connected network ports (peak of 4.2Tbps in 2015). On the backside of UniBoard2 eight DDR4 SODIMM modules are placed. The board itself is pin-compatible with the far more powerful 14nm Stratix10 devices, which will become available in early 2017. Within the UniBoard2 project JIVE was responsible for the project lead, the correlator firmware and parts of the test firmware. ASTRON was responsible for designing and making the hardware and parts of the test firmware. The University of Bordeaux and INAF were responsible for digital receiver firmware, the University of Manchester for the pulsar binning firmware, MPG for a beam former implementation and the University of Orleans for the RFI mitigation firmware. |
| Copyright: | JIVE / ASTRON |
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